Steven M. Carr

Research

Compilers and program analysis, software security, and the tools that make both teachable.

Research interests

Software and system security

Software security, file-system security, mandatory integrity controls, and access-control policy languages.

Security education

Visualization systems and curricula that make secure coding, access control, and concurrency concepts concrete for students.

Program analysis

Dynamic program analysis, program locality analysis, and reuse- and memory-distance measurement.

Compilers and architecture

Memory-hierarchy optimization, high-performance computing, language run-time systems, virtualization, code generation for embedded systems, and cooperation between architecture and compilers.

Selected projects

VACCS — Visualization and Analysis for C Code Security

An NSF-funded system that combines static and dynamic analysis with visualization to help students see how C programs actually behave in memory — buffer overruns, integer coercion, and process address-space layout — rather than only reading about them. Project materials are at vaccsedu.org.

Access-control visualization tools

A family of teaching tools built with collaborators at Michigan Tech — MLSvisual (multi-level security), RBACvisual (role-based access control), DTEVisual (domain type enforcement), and UNIXvisual (UNIX permissions) — that let students manipulate policies and immediately see the resulting authorization decisions.

ThreadMentor and ConcurrentMentor

A portable class library, visualization system, and user-level kernel for teaching multithreaded and distributed programming, developed over more than a decade of NSF-supported curriculum work.

Memory-hierarchy and locality optimization

Long-running work on scalar replacement, unroll-and-jam, loop transformations for data locality, compiler blockability of numerical algorithms, and reuse-distance-based prediction — including collaborations with Ken Kennedy, Kathryn McKinley, and Chau-Wen Tseng that remain widely cited in the compiler literature.

Funded grants

Listed most recent first, as in the CV. NSF awards link to their public award pages on nsf.gov; industry awards have no public record to link.

  1. Collaborative Research: CyberTraining: Pilot: Concurrent Computing Curricula for Cyber-Physical SystemsPI National Science Foundation · co-PIs: Zachary Asher, Radu Babiceanu · Michigan Tech PI: Jean Mayo · $299,403 (WMU: $120,941) · 8/26 – 7/28
  2. CyberTraining: Implementation: Small: Promoting AI Readiness for Machine-Assisted Secure Data Analysis (PAIR4MASDA)co-PI National Science Foundation · PI: A. Fong · co-PIs: S. Bhattacharjee, A. Gupta, K.C. Chen, S. Carr · $499,876 · 8/23 – 7/27
  3. CyberTraining: Pilot: Modular Experiential Learning for Secure, Safe and Reliable AI (MELSSRAI)co-PI National Science Foundation · PI: A. Fong · co-PIs: S. Bhattacharjee, A. Gupta, S. Carr · $298,257 · 8/20 – 7/22
  4. VACCS: Visualization and Analysis for C Code SecurityPI National Science Foundation · co-PIs: J. Mayo, C.-K. Shene, Z. Yang · $300,000 (WMU: $170,000) · 1/16 – 12/19
  5. Adaptive Memory Resource Management in a Data Center — A Transfer Learning Approachco-PI National Science Foundation · PI: L. Brown · co-PIs: Z. Wang, S. Carr · $400,000 (WMU: $100,000) · 9/14 – 8/17
  6. Accessible Access Controlco-PI National Science Foundation · PI: J. Mayo · co-PIs: S. Carr, C.-K. Shene, C. Wang · $199,164 (WMU: $40,000) · 9/13 – 8/15
  7. Accelerated Processor Unit (APU) Software for Convex OptimizationPI Advanced Micro Devices · co-PIs: S. Nooshabadi, Z. Wang · $2,000
  8. Compiler Evaluation for the PowerPC 476 Processorco-PI LSI Corporation · co-PIs: Steve Carr, Zhenlin Wang · $18,215 · 5/10 – 8/10
  9. Feedback-Directed Resource Management in Virtual Private Machinesco-PI National Science Foundation · co-PIs: Steve Carr, Zhenlin Wang · $60,000 · 9/08 – 12/10
  10. A Performance Model for Partitioned Global Address Space Languagesco-PI National Science Foundation · PI: Steven R. Seidel · co-PIs: Steve Carr, Zhenlin Wang · $70,000 · 9/08 – 8/10
  11. Compiler Development for the Agere Payload Plus Network ProcessorPI Agere Systems · $85,267 · 9/04 – 12/05
  12. ITR: Exposing the Compiler to the Hardware: Memory Subsystem Optimizations Through Compiler/Micro-architecture Cooperation using Set Membership Information and Color Setsco-PI National Science Foundation · PI: Soner Önder · co-PI: Steve Carr · $280,000 · 9/03 – 8/06
  13. Compilation for the Agere APP5xx and APP7xx Family of Network ProcessorsPI Agere Systems · $62,068 · 1/03 – 12/03
  14. High-Level Optimization for DSP ArchitecturesPI National Science Foundation · $249,964 · 9/02 – 8/05
  15. Concurrent Computing in an Upper-Level Computer Science CurriculumPI National Science Foundation · co-PIs: Jean Mayo, C.-K. Shene · $299,865 · 6/00 – 5/03
  16. Code Generation for ILP Architectures with Partitioned Register Filesco-PI National Science Foundation · PI: Philip H. Sweany · co-PI: Steve Carr · $325,434 · 7/98 – 6/02
  17. Teaching Multithreaded Programming to Computer Science Undergraduatesco-PI National Science Foundation · PI: C.-K. Shene · co-PI: Steve Carr · $50,002 · 3/98 – 5/99
  18. Register-Bank Assignment for Distributed-Register, Instruction-Level Parallel Architecturesco-PI Texas Instruments · PI: Philip H. Sweany · co-PI: Steve Carr · $42,830 · 9/97 – 8/98
  19. Generating Efficient Code for Horizontal Micro-Architectures with Partitioned Register Filesco-PI Texas Instruments · PI: Philip H. Sweany · co-PI: Steve Carr · $23,715 · 9/95 – 8/96
  20. Hiding the Latency Between Level-1 and Level-2 Cache on the DEC Alpha 21164PI Digital Equipment Corporation · co-PI: Philip H. Sweany · $137,647 · 7/95 – 8/97
  21. Improving Memory Performance on the Hewlett-Packard PA-RISCPI Hewlett-Packard Company · $53,480 · 9/94 – 8/95
  22. Improving the Cache Performance of Scientific ApplicationsPI National Science Foundation · $90,984 · 7/94 – 6/97
  23. Cache-Conscious Loop UnrollingPI Hewlett-Packard Company · $41,984 · 7/93